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C HAPTER 2: D ESIGN E NTRY
C ONSTRAINT E NTRY
Figure 3. Constraint & Assignment Entry Flow
Quartus II
Settings Dialog Box
Quartus II
design files
Quartus II
Assignment Editor
Quartus II
Pin Planner
Quartus II
Design Partitions
Window
Quartus II
Chip Planner
TimeQuest
Timing Analyzer
Quartus II
Project File ( .qpf )
Quartus II
Settings File ( .qsf )
Verilog Quartus Mapping
Files ( .vqm )
from Block-Based
Design
Synopsys Design
Constraints File ( .sdc )
to Quartus II
Analysis & Synthesis
Using the Assignment Editor
The Assignment Editor is the interface for creating and editing node and
entity-level assignments in the Quartus II software. Assignments allow you
to specify various options and settings for the logic in your design. You can
enable or disable individual assignments, and you can also add comments
to an assignment.
The spreadsheet in the Assignment Editor provides applicable drop-down
lists or allows you to type assignment information. As you add, edit, and
remove assignments, the corresponding Tcl command appears in the
Messages window.
When creating and editing assignments, the Quartus II software
dynamically validates the assignment information where possible. If an
assignment or assignment value is illegal, the Quartus II software does not
add or update the value, and instead reverts to the current value or does not
accept the value. When you view all assignments, the Assignment Editor
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I NTRODUCTION TO THE Q UARTUS II S OFTWARE
A LTERA C ORPORATION
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相关PDF资料
SW-QUARTUS-SE-FLT
SUBSCRIPTION FLOATALL REPL
SW006012
C COMPILER FOR DSPIC30F FAMILY
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C COMPILER MPLAB FOR DSPIC DSC
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